The Domino Sampling Chip DSC

The Domino Sampling Chip (DSC) is an analog CMOS waveform sampling device, designed at PSI and dedicated to the PIBETA detector. The main results of its development are:

The sampling speed of the DSC is continously adjustable between ~0.4...~1.2 GHz. The figure below show the sampling speed of the device as a function of V_DS. For further information see Principle of Operation of the DSC

The DSC shows satisfactoring response to different waveforms: Below a comparison of a CsI-pulse sampled with a digital scope TDS540 (right) and the DSC (left).

A Zero Suppression (ZS) circuit has been designed and implemented in the new iteration of the chip, which is succesfully operating. A 8 channel motherboard is currently under developpement. For further information see The Motherboard DSM100

Here are some new links about the DSC Project

For further information see Principle of Operation of the DSC Simple setup to run the DSC

The following persons are involved in the DSC project at PSI:
Ch. Broennimann, P. U. Dick, R. Horisberger, S. Ritt, R. Schnyder, H.P. Wirtz

Ch. Broennimann, 6. Jan 1995
last update: H.P. Wirtz, 4th August 1999

The Domino Sampling Chip DSC

The Domino Sampling Chip (DSC) is an analog CMOS waveform sampling device, designed at PSI and dedicated to the PIBETA detector. The main results of its development are:

Here are some new links about the DSC Project

For further information see Principle of Operation of the DSC Simple setup to run the DSC The following persons are involved in the DSC project at PSI: Ch. Broennimann, P. U. Dick, R. Horisberger, S. Ritt, R. Schnyder, H.P. Wirtz Ch. Broennimann, 6. Jan 1995 last update: H.P. Wirtz, 4th August 1999