The Domino Sampling Chip DSC

The Domino Sampling Chip (DSC) is an analog CMOS waveform sampling device, designed at PSI and dedicated to the PIBETA detector.

Sampling frequencies up to 1.2 GHz are generated on the chip. The analog waveform is stored in 128 sampling capacitors. They can be read out with a frequency of 2.5 MHz.
The timing non-linearity is less than 0.08%, the amplitude non-linearity less than 0.08%.

Links to DSC Pages:

Introduction and Principle of Operation
Response to Different Waveforms
Zero Suppression Mechanism
Simple setup to run the DSC
DSC Test Environment
The DSC in the PiBeta Experiment
DSC Problem Solver

The first publication on the DSC is available as PDF-File

The following persons are involved in the DSC project at PSI:

Ch. Broennimann, P.U. Dick, R. Horisberger, S. Ritt, R. Schnyder,  H.P. Wirtz

H.P. Wirtz, August 9, 2000